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NXP Semiconductors /NeoM3 /I2S /DMA1

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Interpret as DMA1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RX_DMA1_ENABLE)RX_DMA1_ENABLE 0 (TX_DMA1_ENABLE)TX_DMA1_ENABLE 0RESERVED0RX_DEPTH_DMA1 0RESERVED 0TX_DEPTH_DMA1 0RESERVED

Description

I2S DMA Configuration Register 1. Contains control information for DMA request 1.

Fields

RX_DMA1_ENABLE

When 1, enables DMA1 for I2S receive.
TX_DMA1_ENABLE

When 1, enables DMA1 for I2S transmit.
RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.
RX_DEPTH_DMA1

Set the FIFO level that triggers a receive DMA request on DMA1.
RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.
TX_DEPTH_DMA1

Set the FIFO level that triggers a transmit DMA request on DMA1.
RESERVED

Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data